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Error detection techniques
Error Possibility during information transfer corrupts 1 or more bits
Bit Drop -> Bit which is 1 at sending end is received as 0
Bit Pickup -> Bit 0 at sending end is received as 1
Sender & Receiver follows Algorithm & Encoding to detect error
1. Parity Check ( odd & even)
Odd Parity System: Should have totally odd no. of 1’s in data including parity bit. If in data the no. of 1’s is odd, parity is 0 else 1
Even Parity System: Vice versa
Eg: Data: 11101110 – OddParity :111011101 – EvenParity:111011100
Data: 11001101 – OddParity: 110011010 – EvenParity: 110011011
Pros & Cons:
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Even no. of bit failures cant be detected
-
Used in PC for stroing memory & reading it back
2. Multiple Bit Error Detection scheme
Causes data files corruption & program corruption
CRC used
- Sending end divides the data by polynomial& remainder is appended to data and sent as CRC Character (CRCC)
- Receiving end applies same polynomial & divides received data & compares new CRCC with received CRCC & detects multiple bit error
- Detection of maximum multiple bit failure depends on power of polynomial.
- Eg: if data is 11101110 and the divisor polynomial is 1110. Append 000 to data (since divisor is 4 digits add 3 zero) and divide it by 1110.
- 11101110000/ 1110 (modulo division). Remainder/CRC is 000.
In pc used for,
- data transfer between floppy disk controller & floppy disk drive & hard disk controller.
- While write CRCC while read check it
Error Correcting Code
- ECC does error detection and correction
- Sending end generates ECC pattern from data bit
- Identifies failing bits & corrects it
In PC,
- Used by hard disk controller for data recorded on hard disk
- R/W memory uses ECC in PC